Company: Careers

Lyric Semiconductor is an innovative, fast-paced company developing a fundamental new approach to implementing computation in physical materials. We are seeking exceptional talent to take us to the next level as we work hard to make a little history and build a great company.

We offer a highly intellectually stimulating and supportive work environment along with attractive compensation and benefits package including medical insurance, dental insurance, vision insurance, short-term disability, long-term disability, life insurance, flexible spending account, commuter benefit, a 401(k) Savings Plan with an employer match and the opportunity for stock options.

Please send application materials to joinus@lyricsemiconductor.com. Any resumes submitted become the sole property of Lyric Semiconductor, Inc.

Senior Design Engineer

As a Senior Design Engineer at Lyric you will work closely with one of Lyric's very highly experienced Design Engineers as well as with Lyric’s applied math group to create a new paradigm in computation. As your design team grows, you will have the opportunity to take an increasing leadership role in your team and in the company.

Job Responsibilities

Your primary responsibility will be to help design analog and mixed-signal circuit blocks. You will participate in architectural decisions and design reviews. You will be responsible for IC simulation and transistor-level design of analog blocks. Your responsibilities will include design, simulation, verification, physical design, bench testing, and support of IC test.

Minimum Qualifications

  • PhD +3 or MSEE +10 years of mixed-signal IC design
  • Experience with design, simulation, and layout of analog and mixed-signal integrated circuits
  • Experience with CMOS transistor-level circuit design
  • Solid understanding of CMOS device physics
  • High level of mathematical/algorithm sophistication
  • Proven track record of successful product development
  • Ability to program as needed
  • Good written and verbal communications skills
  • Solid problem-solving and trouble-shooting skills
  • Enjoy tinkering, taking things apart, and making things work
  • Ability to ask good questions

Desired Competencies

  • Proficiency with Cadence tools
  • Behavioral modeling with verilogAMS
  • Experience with MATLAB simulation
  • Java, Python, Perl or similar
  • Experience working in a start-up environment
  • US citizenship or Visa

Software Engineer (Simulation)

Job Responsibilities

You will be part of a design team developing next generation error-correction technology for the non-volatile memory industry. Your primary responsibility will be to develop and run behavioral-level simulation models of the error correction decoder to determine its performance and to help facilitate design trade-offs. Software must balance accurate hardware modeling and high-speed operation to allow measurement of very low error-rate performance. Software will make use of parallel cloud-based computing to achieve high throughput. Your responsibilities will include development of high-level models, tools to facilitate model development, tools to facilitate cloud-based parallelism, verification of model accuracy, running simulations of model variations, working with hardware developers to guide hardware design choices.

Minimum Qualifications

  • B.S. in Computer Science, Electrical Engineering or Mathematics
  • 5+ years of related experience
  • Experience developing software in Java
  • Experience in developing parallel computing software
  • Proficiency in MATLAB and Python or similar languages
  • Some familiarity with error correction techniques
  • Comfortable with mathematical and algorithmic concepts
  • Exceptional attention to detail
  • Ability to program quickly, and to solve problems quickly
  • Excellent written and verbal communication skills
  • Ability to work smoothly with others, ask questions when needed, and keep others informed of progress and problems

Desired Competencies

  • Experience in modern iterative error correction methods
  • Experience with cloud computing
  • Experience with GPU programming
  • Experience working with integrated circuit developers
  • Experience working with analog circuit designers

Place and Route Engineer

Lyric Semiconductor is an early-stage, fast-paced, fabless IC venture on a mission to revolutionize communications signal chains using very innovative analog and digital architectures and technologies. We are now seeking exceptional talent to take us to the next level as we work hard to make a little history and build a great company.

Job Responsibilities

Lyric has a current need for a permanent hire responsible for floor planning, physical layout, place & route, verification, and tape out for our mixed signal IC's. Consultant to permanent arrangements will also be considered.

Minimum Qualifications

  • Expertise in Cadence Encounter standard cell place-and-route; from gate level netlist in to tape-out ready timing closed gds out.
  • Ability to construct and debug SDC as well as analyze and fix timing paths in Encounter.
  • Responsible for providing weekly progress reporting and scheduling.

Desired Competencies

  • Knowledge of Assura LVS, DRC and RTL synthesis a plus.
  • Mixed-signal block level floor planning experience.
  • Experience in physical implementation of mixed-signal blocks.
  • Strong communication skills as this person will interface with design and layout personnel.
  • Experience with Skill scripting to auto-generate schematics, layout, and pcells is highly desirable.

Layout Consultant

Lyric Semiconductor is an early-stage, fast-paced, fabless IC venture on a mission to revolutionize communications signal chains using very innovative analog and digital architectures and technologies. We are now seeking exceptional talent to take us to the next level as we work hard to make a little history and build a great company.

Job Responsibilities

Lyric has a periodic need for analog cell layout consultants off and on in our design cycle.

Minimum Qualifications

  • The successful candidate will be responsible for top level planning, layout, and verification of custom analog CMOS cells in Cadence IC 6.1 Virtuoso and Cadence Assura LVS and DRC.
  • This candidate will work very closely with senior analog design engineers and therefore must be willing to come to Cambridge at least 3 days a week for the first couple weeks. Otherwise we are opened minded about working at home.

Desired Competencies

  • Cadence XL layout preferred.
  • Experience with Skill scripting to auto-generate schematics, layout, and pcells a plus.

Summer Research Internship 2011 (Paid)

For the past several years, Lyric Semiconductor, Inc. has hosted under graduate and graduate students in Applied Mathematics or EECS from first-tier academic institutions for Summer research projects. At Lyric you will work closely with Lyric's scientists to pioneer a new paradigm in computation. Lyric is located in Kendall Square in Cambridge, MA, one block from MIT.

Desired Capabilities

  • Careful reasoning ability
  • Ability and desire to write numerical simulations to test hypotheses
  • Comfort with Java, C++, Python, MATLAB, SPICE or other programming languages
  • High level of creativity
  • Aggressive pursuit of research results
  • Excellent written and verbal communication skills
  • You have physical intuition gained by having directly built or repaired things
  • Ability to work with others, ask questions when needed, and keep others informed of progress and problems